Automotive manufacturers have invested heavily in hardware-in-the-loop (HIL) environments and built extensive libraries of plant models, restbus configurations, and test cases. However, when validation moves to software-in-the-loop (SIL) environments, these artifacts often have to be recreated for virtual testing. This duplication increases engineering effort, introduces inconsistencies, and slows down validation activities.
At the same time, automotive software is becoming increasingly complex while development cycles continue to shorten. As a result, OEMs are looking for more efficient ways to use existing validation artifacts across SIL and HIL environments. The dSPACE tool chain supports this approach by enabling the reuse of models, communication setups, ECU artifacts, and test projects across both environments.
What roles do SIL and HIL play in the validation workflow?
SIL and HIL are complementary validation approaches used at different stages of development. While SIL supports early and scalable testing in a virtual environment, HIL validates software behavior on real ECU hardware under realistic operating conditions.
SIL helps teams:
- Start validation earlier
- Automate regression testing
- Debug and iterate quickly
- Execute tests at scale
HIL helps teams:
- Validate real-time behavior
- Verify timing-critical functions
- Test with physical interfaces and hardware
Why should OEMs reuse HIL test artifacts in SIL instead of rebuilding them?
SIL and HIL serve complementary roles in the validation workflow, which often requires teams to perform similar validation activities across both environments. As a result, OEMs are increasingly looking for ways to reuse validation artifacts across SIL and HIL.
OEMs do not want two sets of tests, two sets of models, or two sets of scenarios. They want one set of validation artifacts that works across multiple environments. Reuse brings several advantages:
- Earlier testing: Test sequences originally meant for HIL can run in SIL before any hardware exists, so teams catch bugs earlier.
- Less pressure on HIL benches: If SIL can run a significant share of the workload, HIL is freed up for final integration and timing-critical checks.
- True CI/CT for automotive: SIL runs on regular PCs, so it fits into overnight builds and automated pipelines.
- Consistent coverage: When both HIL and SIL use the same artifacts and scenarios, failures show up earlier and are easier to reproduce.
- Lower development costs: Engineers do not have to write the same test scripts twice and do not need to redo work that already exists.
How does dSPACE enable reuse of HIL artifacts in SIL?
By keeping models, communication setups, ECU artifacts, and test projects compatible across both environments, dSPACE enables teams to reuse existing HIL artifacts in SIL with minimal rework. This helps reduce duplicate engineering effort, maintain consistency across validation stages, and support earlier and more scalable testing.
HIL-to-SIL reuse typically focuses on five key areas:
- Plant models
- Network and restbus configurations
- Artifacts and V-ECUs
- Integrating platforms
- Test automation projects
- Scalable simulation execution
The following sections explain how each of these elements can be transferred from HIL to SIL within the dSPACE tool chain.
Plant Models
Plant models created in Simulink (.slx) or exported as FMUs from FMI-compliant tools can be reused in SIL environments. By converting these models into .SIC files, they can be integrated into the virtual test setup without rebuilding the plant model.
This enables realistic system-level simulation, supports early validation before hardware is available, and helps ensure model consistency across SIL and HIL testing.
Restbus Configurations
Restbus simulation is used to validate communication between the system under test and its network environment. SIL restbus simulations can be created for CAN, CAN FD, J1939, FlexRay, and Ethernet networks, enabling early validation of communication behavior.
Existing database files such as DBC, LDF, and ARXML can be imported to generate BSC containers that can be reused in both SIL and HIL environments. This helps maintain consistent network behavior across test stages while reducing configuration effort.
Artifacts for V-ECUs
Existing ECU artifacts can often be reused directly in SIL, reducing the effort required to create a V-ECU. Depending on the project, existing systems under test (SUTs), V-ECUs, FMUs, ROS-based algorithms, or other dSPACE artifacts can be executed directly on the simulation platform.
When only source code is available, dSPACE tools support integrating the code into the simulation environment and extending it for simulation purposes. For early functional testing, simple V-ECUs can be derived from Simulink/TargetLink models or created from C/C++ code using the dSPACE V-ECU SDK. For more comprehensive system-level testing, complete V-ECUs containing application software, RTE, and basic software can be assembled in SystemDesk.
Because generating V-ECUs from production ECU software can be challenging, dSPACE also provides guidance to support efficient SIL implementation.
Integrating Components in VEOS
VEOS serves as the central simulation and integration platform where V-ECUs, plant models, restbus simulations, and other components are brought together. The platform manages communication and synchronization between components and supports standards-based integration as well as co-simulation approaches.
This enables fast, hardware-free, and fully reproducible SIL simulations. VEOS also simulates realistic network communication, supporting signal exchange, message monitoring, and fault injection. The platform is scalable and can be deployed from a local PC to cloud-based environments.
Test Automation Projects
The integrated simulation environment generates an executable that can be used for experimentation and automated testing of V-ECU functionality. Existing HIL experimentation projects and test cases can be reused by simply switching the execution platform from HIL to SIL within the same test software.
Using common tools and configurations across both environments helps maintain consistent validation workflows while reducing migration effort.
Scaling SIL Testing
Because SIL simulations run on standard PC infrastructure, they can be integrated into automated regression testing workflows and executed in parallel. The same simulation setups can also be deployed in cloud environments without requiring changes to the underlying simulation architecture.
This enables broader test coverage, faster validation cycles, improved collaboration, and more efficient use of physical HIL resources.
What are the practical benefits of HIL-to-SIL reuse?
Reusing validation artifacts across HIL and SIL environments helps OEMs reduce duplicate engineering effort and establish more consistent validation workflows. Instead of maintaining separate models, configurations, and test projects, teams can leverage existing artifacts across multiple development stages.
This approach enables earlier software validation, faster regression testing, improved utilization of physical HIL resources, and better support for automated CI/CD processes. By combining reusable artifacts with a common tool chain, development teams can scale validation activities more efficiently while maintaining consistency between virtual and hardware-based testing.
About the Authors
Yogesh Tulshiram Bhoi
Field Application Engineer, dSPACE India Solutions Pvt. Ltd.
Sajith Painadiyil Surendran
Portfolio Manager SDV, dSPACE GmbH
