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XSG Utils Library

Faster implementation of FPGA models

The XSG Utils Library offers ready-to-use function blocks for rapid control prototyping (RCP) or hardware-in-the-loop (HIL) simulation projects. The library gives users of real-time FPGA applications enhanced function blocks for implementing their own projects.

Application Areas

The XSG Utils Library offers users of real-time FPGA applications enhanced function blocks for implementing their own projects. The library is completely open and can be used in rapid control prototyping (RCP) projects as well as hardware-in-the-loop (HIL) simulation.

Due to the generic programming, the library can be applied to all freely programmable dSPACE real-time FPGA platforms with a Xilinx FPGA. 

Key Benefits

The XSG Utils Library contains essential, often needed function blocks for FPGA programming, similar to standard Simulink functions. The high-quality function blocks are ready to use and easy to adapt to your project, so they greatly facilitate your FPGA programming. They range from enhanced I/O, scope, and look-up table functions to an average calculator, sine generator, and wavetable encoder.

Different versions of all these libraries are available for developers and for users of FPGA applications. The XSG Utils Library offers pre-built custom instruments that enable quick access to the most used functions out of ControlDesk. 

Task-Specific Versions

The XSG Utils Library is available in two versions:

  • XSG Utils Library for developers of FPGA applications to embed their own FPGA real-time models with Xilinx® System Generator (XSG) in Simulink®.
  • XSG Utils Interface Library for linking the preconfigured XSG-Utils-based FPGA application with the Simulink-based processor application for data exchange and parameterization.

For comprehensive development projects, both versions are needed.

Available Function Blocks

  • Scope
  • PWM Measurement
  • PWM Generator
  • Look-up Table
  • I/O Access Functions
  • Integrator
  • PI Controller
  • Average Calculator
  • Sine Generator
  • Discrete PT1
  • Scaling
  • Wavetable Encoder
  • APU
  • Small Apps
  • Version Info

Functionality Description
Scope Captures 8 (out of 16) high-frequency signals within the FPGA clock rate and sends the captured data synchronously to the processor, where it can be displayed and stored in instruments such as the ControlDesk XY plotters.
PWM Measurement Measures the dead time (between HSD and LSD), high time, and period time of a single- or three-phase signal.
PWM Generator Generates a pulse-center-aligned PWM signal (single-phase and three-phase). The dead time and the duty cycle can be set on the processor side (tunable online).
Look-up Table Configures the accuracy of the normed table, and the minimum and maximum data values to be covered. It also specifies the amount of bits to be calculated automatically. Linear interpolation algorithms or the Use Input Below method can be configured online: 1-D, 2-D and 3-D look-up tables are available.
I/O Access Functions Enables flexible programming and run-time parameterization of the onboard FPGA I/O as well as the stimulus mode.

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