FPGA Programming Blockset 2023-A

Support of MathWorks^© HDL Coder^TM

The FPGA Programming Blockset now supports MathWorks^© HDL Coder^TM for modeling parts of the FPGA model with Simulink^® blocks. This feature lets you use existing Simulink models directly as part of your FPGA application. For example: You can use a Simulink model of a controller for first functionality tests before you optimize the FPGA utilization of the controller.
However, Xilinx^® Vivado^® Design Suite and Xilinx^® Vitis^TM Model Composer are still required to build the entire FPGA application.

Product Information

FPGA Programming Blockset Simulink® blockset for using a FPGA model created with a dSPACE system using the Xilinx® Vitis™ Model Composer HDL Library.

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