The FPGA Programming Blockset is a Simulink blockset for using a FPGA model created with a dSPACE system using the Xilinx® Vitis™ Model Composer HDL Library, the former Xilinx® System Generator Blockset.
With the FPGA Programming Blockset 22.2, it is possible to embed Simulink functions in an FPGA container. The FPGA container can therefore contain preprocessing and postprocessing components. These components let you also process data exchanged between the FPGA and the computation node (CN) directly on the CN and/or during the data exchange between the FPGA and CN application.
The FPGA Programming Blockset is a Simulink blockset for using a FPGA model created with a dSPACE system using the Xilinx® Vitis™ Model Composer HDL Library, the former Xilinx® System Generator Blockset. It provides blocks for implementing the interface between the FPGA mounted on a dSPACE board and its I/O, and the interface between the dSPACE FPGA board and its computation node (CN).
The blockset can be used with the following dSPACE FPGA platforms, which provide user-programmable FPGAs:
Typical application scenarios for rapid control prototyping (RCP) and hardware-in-the-loop (HIL) simulation are:
The dSPACE FPGA platforms provide a Xilinx® FPGA for which you can implement an application graphically by using Xilinx® Vitis™ Model Composer HDL Library, the former Xilinx® System Generator Blockset in Simulink. The FPGA Programming Blockset lets you integrate the resulting FPGA model in a Simulink model that runs on dSPACE hardware. The FPGA Programming Blockset gives you a convenient way to connect the I/O board’s I/O driver components and to model the connection to a processor-based computation node (SCALEXIO processing hardware, MicroLabBox or MicroAutoBox). The data exchange supports fixed-point data types as well as floating-point data types. Thus, FPGA programming is seamlessly integrated into the Simulink environment. With the FPGA blockset, you can synthesize, build, and program the FPGA or processor directly from Simulink for optimal convenience. During run time, you can access variables to trace or modify them, without having to modify the model.
Alternatively, the handcode interface lets you program the FPGA boards in VHSIC Hardware Description Language (VHDL) or Verilog.
Optional Hardware | Boards and Variants |
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SCALEXIO |
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MicroAutoBox |
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MicroLabBox |
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Functionality | Description |
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General |
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FPGA interface |
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Handcode interface |
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I/O access |
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Processor-FPGA communication |
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Inter-FPGA communication between SCALEXIO FPGA base boards |
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Asynchronous tasks |
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Variable access1) |
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Remote FPGA build |
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