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内置验证和检验支持

测试的三种仿真模式

TargetLink 执行三种不同的仿真模式时,没有对模型或生成的代码进行任何更改。TargetLink能够在背景中自动执行这些任务。

虽然代码生成器产生的结果几乎完美,但是与手动编程相比,生成的代码和基础规格仍然需要进行测试。 TargetLink 提供了功能强大而简单易用的方法来验证所生成的代码。执行代码测试的开发环境与指定基础仿真模型所处的开发环境相同。当仿真结果相匹配的时候可获得功能上的一致性。 Targetlink提供三步验证过程,只需按下按钮即可显示规格(模型)和实现(生成的代码)的功能是否相同。

模型在环仿真

  • 记录下的数据可以作为仿真模型的参考依据。所选模块和状态变量的信号由TargetLink自动记录。
  • 模型在环仿真捕获模型的特定行为,随后使用 C 代码实现该行为。记录下的信号图将作为后续验证步骤的参考。
  • 模型在环仿真也可以用于检测整型变量的溢出,获得的结果可用于基于仿真的自动缩放。

软件在环仿真

  • 代码生成之后可替代仿真模型中的控制器模块(例如相同的被控对象和激励信号)。TargetLink能够在背景中自动执行这些任务。
  • 您仍然可以看到控制器模块,虽然它是在上位机上执行的代码。信号图应该与模型在环仿真的结果大致相仿。若出现并不相仿的情况,则需对它们进行分析,了解产生偏差的原因并调整定点设置。

处理器在环仿真

  • 生成的代码在嵌入式处理器上运行,但是即使在上位机上正确运行的代码也会出现问题,所以必须进行进一步观察。
  • 将一个现成的评估板卡连接到上位机上,通过目标编译器对生成的代码进行编译,并下载到评估板卡上。
  • Targetlink对上位机与评估板卡之间的通信进行管理。 所有这些活动都是自动化的,无需用户介入。 只需两次点击即可在评估板卡上进行仿真。

仿真概念的特点和优点

Feature Description Benefit
  • MIL/SIL/PIL simulation at the click of a button
  • Switching from MIL to SIL or PIL simulation requires just one click
  • Powerful simulation environment
  • No need for separate test models, generation of S-functions or manual insertions into test harness models
  • Integrated data logging
  • Built-in data logging and result plotting for all simulation modes
  • No model modifications necessary
  • Available for all simulation modes
  • Direct comparison of MIL/SIL/PIL results
  • Automatical plotting of all simulation results in the same plot window
  • Display results of simulations in different modes directly and analyze deviations
  • Direct feedback whether code matches model simulation
  • Detailed signal analysis and deviation plots
  • Zoom signals to visually inspect deviations, display constraints (e.g., defined ranges), use cursor to scroll through signal histories, display signal values numerically or plot signal deviation
  • Get a clear picture of the signal behavior
  • Especially useful for conversion from floating-point to fixed-point

TargetLink的更多验证特点

Feature Description
  • Integrated data logging and plotting
  • Built-in TargetLink blocks come with an integrated data logging functionality. In the block dialogs, you can specify whether to log the block output signals.
  • Run-time analysis for profiling the code
  • Processor-in-the-loop (PIL) simulation can also be used to profile the generated code. During PIL simulation, TargetLink automatically measures execution time and stack consumption directly on the target processor.
  • Code coverage analysis
  • You can assess how comprehensive tests are by using code coverage analysis. TargetLink offers C0 and C1 coverage analysis, also called statement coverage and decision coverage.
  • Model-code traceability
  • For improved traceability and simplified code reviews, code files can optionally be generated in HTML format, with hyperlinks for navigation from model to code and vice versa.