For a better experience on dSPACE.com, enable JavaScript in your browser. Thank you!

DS5203 FPGA Board1)

各个应用的自编程的 FPGA

DS5203 FPGA Board专门用于需要高速及高分辨率信号预处理的应用。

DS5203 FPGA Board可以适应各种任务,让您灵活应对更严苛的要求,比如信号调理、使用新接口或模型组件的加速。FPGA 能够有效减轻处理器板卡的任务负担,比如 ECU 开发阶段的信号预处理任务等。DS5203 板卡运行频率为 100 MHz,是发动机爆震、缸压分析及电驱动项目等应用领域的理想之选。DS5203 与 XSG 模型库密切配合。

主要优点

现场可编程门阵列 (FPGA) 是一种半导体器件,由可配置的逻辑元件组成。DS5203 FPGA Board搭载了完全可编程的 Xilinx Virtex®-5 FPGA (由ISE支持,或者配备了强大的 Xilinx Kintex®-7芯片(由Vivado®支持)。此外,该板卡还提供 6 个 ADC 通道、6 个 DAC 通道及 16 个数字 I/O 通道,并通过 PHS 总线连接到处理器板卡。I/O 通道的数量可以通过背板模块增加。

 

Parameter Specification
DS5203 LX50 DS5203 SX95 DS5203 7K325 DS5203 7K410
General
  • User-programmable FPGA
  • User-programmable FPGA
  • User-programmable FPGA
  • User-programmable FPGA
FPGA
  • Xilinx® Virtex®-5 LX50T-1C
  • Logic cells: 46080 (Virtex®-5 slices: 7200; DSP slices: 48)
  • Distributed RAM: 480 kbit
  • Block RAM: 2160 kbit
  • Xilinx® Virtex®-5 SX95T-2C
  • Logic cells: 94298 (Virtex®-5 slices: 14720; DSP slices: 640)
  • Distributed RAM: 1520 kbit
  • Block RAM: 8784 kbit
  • Xilinx® Kintex®-7 K325
  • Logic cells: 326080 (Kintex®-7 slices: 50950; DSP slices: 840)
  • Distributed RAM: 4000 kbit
  • Block RAM: 16020 kbit
  • Xilinx® Kintex®-7 K410
  • Logic cells: 406720 (Kintex®-7 slices: 63550; DSP slices: 1540)
  • Distributed RAM: 5663 kbit
  • Block RAM: 28620 kbit
Xilinx® software support
  • Only ISE®
  • Only ISE®
  • Vivado®
  • Vivado®
Device timing
  • 100 MHz
  • 100 MHz
  • 100 MHz
  • 100 MHz
Digital I/O
  • 16 channels, usable as input or output
  • 16 channels, usable as input or output
  • 16 channels, usable as input or output
  • 16 channels, usable as input or output
    Input
  • Maximum input voltage: 15 V
  • Digital input: Threshold adjustable for each channel from 1 V to 7.5 V

Output

  • Digital output: Push-pull drivers; one output voltage can be selected for all channels: 3.3 V or 5 V
Input
  • Maximum input voltage: 15 V
  • Digital input: Threshold adjustable for each channel from 1 V to 7.5 V

Output

  • Digital output: Push-pull drivers; one output voltage can be selected for all channels: 3.3 V or 5 V
Input
  • Maximum input voltage: 15 V
  • Digital input: Threshold adjustable for each channel from 1 V to 7.5 V

Output

  • Digital output: Push-pull drivers; one output voltage can be selected for all channels: 3.3 V or 5 V
Input
  • Maximum input voltage: 15 V
  • Digital input: Threshold adjustable for each channel from 1 V to 7.5 V

Output

  • Digital output: Push-pull drivers; one output voltage can be selected for all channels: 3.3 V or 5 V
Analog I/O   Input
  • 6 channels
  • Resolution: 14 bit pipelined
  • Sampling rate: 10 Msps
  • Input voltage range selectable for each channel: ±5 V or ±30 V
Output
  • 6 channels
  • Resolution: 14 bit
  • Update rate: 10 Msps
  • Output voltage range: ±10 V
Input
  • 6 channels
  • Resolution: 14 bit pipelined
  • Sampling rate: 10 Msps
  • Input voltage range selectable for each channel: ±5 V or ±30 V
Output
  • 6 channels
  • Resolution: 14 bit
  • Update rate: 10 Msps
  • Output voltage range: ±10 V
Input
  • 6 channels
  • Resolution: 14 bit pipelined
  • Sampling rate: 10 Msps
  • Input voltage range selectable for each channel: ±5 V or ±30 V
Output
  • 6 channels
  • Resolution: 14 bit
  • Update rate: 10 Msps
  • Output voltage range: ±10 V
Input
  • 6 channels
  • Resolution: 14 bit pipelined
  • Sampling rate: 10 Msps
  • Input voltage range selectable for each channel: ±5 V or ±30 V
Output
  • 6 channels
  • Resolution: 14 bit
  • Update rate: 10 Msps
  • Output voltage range: ±10 V
Further interfaces

Slot for one I/O module for extending the analog and digital I/O (p. 453)
Connection for the angular processing unit (APU) bus
2 connectors for inter-FPGA communication

  Physical size 340 x 125 x 15 mm (13.4 x 4.9 x 0.6 in)
  Ambient temperature 0 ... 55 ºC (32 ... 131 ºF)
  Power supply +5 V ±5%, 2.5 A
+12 V ±5%, 0.7 A
-12 V ±5%, 0.1 A

DS5203M1 多路 I/O 通道模块是用于 DS5203 FPGA 板卡的背板。它可扩展可用的数字和模拟 I/O 通道数量,赋予您更大的灵活性。

技术细节

Parameter Specification
Digital I/O
  • 16 channels, usable as input or output
Analog I/O Input
  • Maximum input voltage: 15 V
  • Threshold for each channel adjustable from 1 V to 7.5 V
Output
  • Push-pull drivers
  • One output voltage can be selected for all channels: 3.3 V or 5 V
Analog I/O Input
  • 6 channels
  • Resolution: 14 bit pipelined
  • Sampling rate: 10 MSPS
  • Input voltage range selectable for each channel: ±5 V or ±30 V
Output
  • 6 channels
  • Resolution: 14 bit
  • Update rate: 10 MSPS
  • Output voltage range: ±10 V
Sensor supply
  • Adjustable
  • Output voltage range: 2 V to 20 V

EV1099 Resolver SC 模块是用于 DS5203 FPGA 板卡或 DS5203M1 多路 I/O 模块的一种信号调理板卡。
它能为电力驱动应用提供特殊的信号调理(比如旋变仿真中的变压器模拟)。
其他功能:
  • 可为所有 6 个 DAC 通道提供可配置的音频变压器
  • 可为所有 6 个 ADC 通道提供可切换的 220 Ω 电阻

 

该模块可以安装在一个 dSPACE Full-Size 仿真器或 Mid-Size 仿真器中。它通过排线连接到 DS5203 或 DS5203M1(针脚兼容)。

1)The end of life of the dSPACE PHS (peripheral high-speed) hardware for modular systems is planned for December 31, 2024. You can still buy the related products up to and including December 31, 2021. New Releases of dSPACE software will still support the dSPACE PHS hardware for modular systems until at least the end of 2023. After the end of life, no services of any kind will be available for these products. We advise against using the PHS hardware products in new projects. For new projects we recommend that you use SCALEXIO, the latest dSPACE technology for modular real-time systems.

Basic Information Further Information Contact Information