Requirement observers that are defined in the BTC Embedded Specifier can be executed on dSPACE platforms VEOS and SCALEXIO. With the latest version 1.4, multiple violations can be recorded in AutomationDesk or ControlDesk.
While building an FPGA model, error messages regarding multi-driven nets are displayed:
Synthesis of the Xilinx System Generator code failed due to multi-driven nets.
This is likely due to a failure in Xilinx System Generator (XSG) code generation. Please restart MATLAB and try again.
How can this issue be avoided?
FAQ 108: Replacing the Hardware Topology of an Application in ConfigurationDesk
How can I replace the hardware topology in my application without having to reconfigure the complete hardware assignment of each I/O function block in ConfigurationDesk?