No matter if it is a battery-electric vehicle (BEV) or a stationary battery storage system for the energy industry: Every battery system requires a battery management system (BMS) to ensure safe, reliable, and long-lasting operation of the battery and its individual cells. The BMS acts like a brain for the battery, monitoring, controlling, and protecting it. The functions of the BMS are in turn coordinated by the main BMS controller. One task of this controller is to communicate with other control units, such as the motor control unit of a BEV. So, if we stay with this image, we can say that the main BMS controller is the brain of the BMS.
In addition to the main controller, individual cell controllers are located on the battery cells. Their main task is to monitor and balance voltages at cell level, while communicating with the main BMS controller. They are usually referred to as cell supervision circuits (CSCs).
The Task
When it comes to testing battery management systems, one possible approach is to test them on the signal level. The focus here is on testing the main functions of the BMS and its interaction with the vehicle network or any other environment – without using high voltages. In this approach, the BMS main controller is the device under test. The battery cells and all CSCs are simulated.
Typical use cases for this approach are integration tests with other control units, such as motor controllers or onboard chargers of BEVs. These integration tests usually take place on a system or full-vehicle hardware-in-the-loop (HIL) simulator.
The Challenges
To optimize a BMS right from the start and to keep its development process as efficient as possible, early testing of the BMS functions is key. At this stage, however, real cell controllers are often not yet available. To enable early testing, the cell controllers, or in other words the CSCs, must therefore be simulated. For the corresponding test solution, this means that the registers, logics, and functions of the simulated CSC chips must be implemented in the test solution.
In addition to the CSCs themselves, their communication with the BMS must also be simulated in the context of this use case. In the real world, the CSCs communicate with the main BMS controller via a communication protocol. When testing the main BMS controller in an HIL environment with simulated CSCs, the test system must therefore support this protocol. In the past, it was very common to use standard CAN communication for this. In this case, setting up the simulation environment was quite simple, as CAN had already been in use for decades. However, today there is a trend towards chip-supplier-specific, isolated protocols, such as isoSPI or Vertical Interface, with high bit rates of 1 MBaud or even higher. This requires a more sophisticated solution for the simulation.
The dSPACE Solution
For testing the main BMS controller together with simulated CSCs, dSPACE offers a special solution, which is called Cell Controller Virtualization (CCV). This solution is the perfect choice for BMS tests on the signal level.
Using the CCV from dSPACE, BMS developers and testers can simulate the appropriate environment for their system under test, the main BMS controller. For this purpose, the dSPACE solution enables the simulation of:
- The cell controllers, also known as CSCs and
- The communication between the cell controllers and the main BMS controller.
Good to know: All hardware and software needed for these BMS tests is available from dSPACE, including modular and scalable real-time platforms as well as a ready-to-use multicell battery model for simulation. More information is available further down on this page.
More In-Depth Information on Our CCV Solution
To meet highest timing requirements, the chip-supplier-specific communication protocols and the relevant chip-specific registers and commands are implemented on a powerful dSPACE FPGA board. The single-ended communication is converted into the differential, isolated protocol by means of a chip-supplier-specific transceiver module.
To simulate an overall realistic behavior of the simulated CSC, you can use ASM Battery, the dSPACE model for battery simulation. Using this simulation model, you can simulate each individual cell of the battery. The model also enables cell balancing and the realistic simulation of temperatures.
Which CSCs does the dSPACE solution support?
Our CCV solution supports several CSCs from different providers, including for example:
- Analog Devices
- NXP
- Texas Instruments
Thanks to its flexible approach, the test solution can be adapted to add new CSC chips to the simulation portfolio.
Why choose the signal-level approach for BMS testing?
When compared to high-voltage BMS testing, the signal-level approach has two decisive advantages which are price efficiency and the compactness of the related test system. This is primarily because no real cell voltages are required for signal-level testing, resulting in a less complex test system with fewer safety installations. Using our CCV solution, developers can test and optimize their BMS functions early in the development process – even before real CSCs are available.
Depending on the test focus, it can therefore make sense to choose the signal-level approach instead of high-voltage BMS testing. One example for this is described in this use case.
Of course, it is also possible to mix the high-voltage and the signal-level test approaches. In this case, some of the CSCs are available and tested as real parts with actual cell voltages, while the remaining CSCs are simulated using dSPACE Cell Controller Virtualization.
