Requirements for Installing the FPGA Programming Blockset
Question
I have purchased dSPACE RCP and HIL software with the FPGA Programming Blockset[1]. Which third-party software is required and is there a prescribed order of installation?
Solution
Required Third-Party Software
The FPGA Programming Blockset requires AMD Vivado™ and the AMD Vitis™ Model Composer, which are both installed via the Vivado installer. Up to Vivado 2020.2, Xilinx Vivado and the Xilinx System Generator for DSP Blockset (XSG [also part of Vivado installer]) were used for generating and synthesizing (V)HDL code.
During the installation of AMD software, ensure that the blockset for the System Generator is installed. To achieve this, select either Vitis™ Model Composer or System Edition.
Note:
Please ensure to always install all device families from Software Requirements of dSPACE FPGA Hardware.
You can use the free-of-charge Vivado ML Standard Edition[2] only if you are working with the DS2655 (7K160) or DS6601 FPGA Base Board. A separate license is required for AMD Vitis™ Model Composer, as listed in the table below.
| AMD Software | Minimum Required License for any dSPACE FPGA Hardware (supported by FPGA Programming Blockset) |
Minimum Required License for DS2655 (7K160), DS6601 |
|---|---|---|
| Vivado | Vivado ML Enterprise | Vivado ML Standard (free of charge) |
| Vitis Model Composer | Vitis™ Model Composer | Vitis™ Model Composer |
[1] Up to and including dSPACE Release 2022-A, this blockset was named RTI FPGA Programming Blockset.
[2] With older versions, this version was known as WebPack Edition. When using WebPack Edition, ensure that XSG is installed separately.
Use Vitis™ Model Composer to open MATLAB®. If multiple MATLAB versions are installed, the newest version is used. To configure the version explicitly, refer to #StartingMATLAB.
Starting with Vivado 2021.1, Xilinx System Generator for DSP is part of the unified Xilinx add-on for Simulink®: Vitis™ Model Composer.
For licensing issues related to this change, refer to https://xilinx.com/support/answers/76039.html
The AMD software version that is compatible with the FPGA Programming Blockset depends on the version of RCP and HIL software you use. There are also limitations regarding MATLAB compatibility. For more information on software compatibility, refer to the compatibility table below.
The Vitis™ Model Composer requires Fixed-Point Designer from MathWorks® for bus widths greater than 53 bits in an FPGA design. For more information, refer to http://www.xilinx.com/support/answers/55830.html. Many XSG solutions provided by dSPACE internally use signals that exceed 53 bits. One example is the APU Interface of the XSG Electric Components solution.
Compatible Software Versions
| dSPACE Release |
FPGA Programming Blockset Version |
Operating System | MATLAB | AMD Software | Compatible dSPACE Hardware |
|---|---|---|---|---|---|
| 2026-A | 26.1 | Windows 11 | R2024a R2024b R2025a |
Vivado 2025.1 | DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox, MicroLabBox II |
| 2025-B | 25.2 | Windows 10 Windows 11 |
R2024a R2024b R2025a |
Vivado 2025.1 | DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox, MicroLabBox II |
| 2025-A | 25.1 | Windows 10 Windows 11 |
R2023b | Vivado 2024.1 | DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox, MicroLabBox II |
| 2024-B | 24.2 | Windows 10 Windows 11 |
R2023a R2023b |
Vivado 2024.1 | DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox, MicroLabBox II |
| 2024-A | 24.1 | Windows 10 Windows 11 |
R2022b Update 6 |
Vivado 2023.22) | DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox, MicroLabBox II |
| 2023-B (SP23)) |
23.2 | Windows 10 Windows 111) |
R2022a Update 6 | Vivado 2023.12) | DS5203 (7k325, 7k410) DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox. MicroLabBox II3) |
| 2023-A | 23.1 | Windows 10 Windows 111) |
R2021b | Vivado 2022.2 | DS5203 (7k325, 7k410) DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox |
| 2022-B | 22.2 | Windows 10 | R2021a, R2021b | Vivado 2022.1 | DS5203 (7k325, 7k410) DS2655 7K160 / 7K410 / DS6601 / DS6602 (with M1, M2, IFPGA, DS6651) MicroAutoBox II/III (with DS1552 or DS1554) MicroLabBox |
For earlier Releases, refer to FAQ285.
Annotations to the table above:
1) Vitis™ Model Composer for Windows 11 is tested by dSPACE but not officially supported by Xilinx in Vivado 2022.2.
However, there are no limitations with regard to the FPGA Programming Blockset (Processor Interface).
2) After updating the Simulink model (Ctrl+D), some of the AMD blocks might break and lose their inports and outports in Model Composer. A patch has been attached to the official answer record: https://support.xilinx.com/s/article/000036355?language=en_US
3) The installer for the Implementation Software Service Pack/Patch is available at http://www.dspace.com/goto?patchessfc
MATLAB Compatibility
The limited MATLAB compatibility, e.g., MATLAB R2023a and R2023b for dSPACE Release 2024-B (refer to software compatibility table above), reflects the requirements of the Xilinx Design Tools (XSG, Vivado) and their impact on the building processes for creating an FPGA application.
In contrast to the FPGA build process, the blocksets and tools for modeling and building the processor application support the regular MATLAB compatibility of a dSPACE Release. Therefore, you can extend the MATLAB compatibility if you model and build the processor application separately from the FPGA application. The only requirement is that the same dSPACE Release is used to build the FPGA application and the processor application.
Example:
The FPGA application is created with an installation set containing dSPACE Release 2024-B, Vivado 2024.1, and MATLAB R2023a. You can transfer and import the generated FPGA application to an installation set containing dSPACE Release 2024-B and MATLAB R2024b and continue your work with ConfigurationDesk or the Processor Interface sublibrary of the FPGA Programming Blockset.
How to Install the FPGA Programming Blockset
The FPGA Programming Blockset is part of dSPACE RCP and HIL software. The blockset is installed with dSPACE Setup. There is no prescribed order of installation for RCP and HIL software and required third-party tools.
You must have an FPGA Programming Blockset license to view or edit FPGA designs. You do not require an FPGA Programming Blockset license to download and work with FPGA designs. If you install the FPGA Programming Blockset without an FPGA Programming Blockset license, the FPGA Interface library is not available.
Example: Installing the FPGA Programming Blockset
A common order of installation is as follows:
- Install MATLAB.
- Install AMD Vivado™ (compatible with the installed MATLAB version) containing the AMD Vitis™ Model Composer.
- Connect Vitis™ Model Composer to MATLAB during the installation process.
- Install dSPACE RCP and HIL software (compatible with the installed MATLAB version).
- Activate the MATLAB version that you connected to Vitis™ Model Composer during the installation process.
- Start MATLAB and check whether Vitis™ Model Composer and the FPGA Programming Blockset were connected correctly. Use the
xilinx.environment.getversion('sysgen')andrtifpgavercommands for this.
Starting MATLAB When Working with FPGA
Use the Vitis™ Model Composer shortcut to start MATLAB whenever you want to work with the FPGA Blockset. If you want to use a MATLAB version other than the one activated via the shortcut, you can explicitly configure the MATLAB version by adding the -matlab <matlabdir> parameter to the shortcut. This might look as follows:
If you are working with a FPGA Programming Blockset earlier than Release 2021-B, you must start MATLAB via a shortcut generated by the Xilinx setup program. This shortcut can be found in the Windows Start menu; its name is System Generator. Starting MATLAB via the normal MATLAB link will cause technical problems.
Software Requirements of dSPACE FPGA Hardware
| dSPACE Hardware Platform | Required Xilinx Design Tools Version | Device Family |
|---|---|---|
| DS5203 (7K325 or 7K410) | ISE 14 / Vivado 2015.2 or later | Kintex-7 |
| MicroAutoBox II with DS1514 | Vivado 2014 or later | Kintex-7 |
| SCALEXIO DS2655 (7K160) FPGA Base Module | ISE 13 to 14 / Vivado 2015.2 or later | Kintex-7 |
| SCALEXIO DS2655 (7K410) FPGA Base Module | Vivado 2016.4 or later | Kintex-7 |
| SCALEXIO DS6601 FPGA Base Module | Vivado 2018.2 or later | Kintex UltraScale |
| SCALEXIO DS6602 FPGA Base Module | Vivado 2018.2 or later | Kintex UltraScale + |
| MicroLabBox | Vivado 2014 or later | Kintex-7 |
| MicroLabBox II | Vivado 2023.1 or later | Kintex UltraScale + |
Hardware Recommendation
To build models that contain FPGA Programming blocks, we recommend using a computer with high single-thread performance. We also recommend using a computer with at least 64 GB RAM.
Tools from MathWorks
MATLAB, Simulink, and Simulink CoderTM are required for modeling and simulating the application. The following tools from MathWorks are optional:
- From RLS 2022-B: Simulink Report GeneratorTM to generate an HTML model of the FPGA model.
- From RLS 2023-A: In addition to the Word Length Calculator of the FPGA Programming Blockset, you can use the Fixed-Point DesignerTM to optimize the use of fixed-point data types.
- From RLS 2023-A: MathWorks HDL CoderTM for modeling parts of the FPGA model with Simulink blocks. This feature lets you use existing Simulink models directly as part of your FPGA application. Using MathWorks HDL coder does not affect the MATLAB compatibility of the FPGA Programming Blockset, because only parts of the FPGA model can be modeled with Simulink blocks. HDL Coder is not required if you only use the Xilinx blockset for the functionality of the FPGA model.
Tags
| Date | 2026-06-04 |
| Hardware Type | MicroAutoBox Hardware |
| Product | DS2655 FPGA Base Board, DS2655M1 Multi-I/O Module, DS2655M2 Digital I/O Module, DS5203 FPGA Board, DS6601 FPGA Base Board, DS6602 FPGA Base Board, DS6651 Multi-I/O Module, FPGA Programming Blockset, MicroAutoBox II, MicroAutoBox III, MicroLabBox, MicroLabBox II, RCP and HIL Software |
| Information Type | Frequently Asked Questions |
| Information Category | Discontinuation, Getting Started, Installation, Licensing, Limitations, Migration, Working with, Troubleshooting, Versions and Compatibility |
| Keywords | MATLAB, Vivado Design Suite, AMD Vitis Model Composer |