RTI-MP1)

For graphical setup of multicore applications on the MicroLabBox

Real-Time Interface for Multiprocessor Systems (RTI-MP) supports multicore applications on the MicroLabBox and helps increase the performance.

  • Interrupts for synchronized task execution on multiple cores
  • Graphical setup of multicore applications on the MicroLabBox in Simulink®

Application Areas

Real-Time Interface for Multiprocessor Systems (RTI-MP) supports multicore applications on the MicroLabBox and helps increase the performance.

Working with RTI-MP

RTI-MP enables you to partition your system model and allocate the parts to the cores of your MicroLabBox by using simple drag & drop operations. Each core submodel can be adjusted individually for optimum performance, including step sizes, integration algorithms and trigger conditions. After specification, you can implement your model on the MicroLabBox with a single mouse click. Build procedures can also be automated with the help of scripts.

Key Benefits

RTI-MP offers a maximum of convenience to accomplish tasks such as:

  • Partitioning the system for optimum processor load
  • Producing the model communication code

System dynamics can be designed in Simulink. 

Automatic implementation is started via buttons: RTI-MP downloads your model to the multicore system and starts running it automatically.

1)The end of life of RTI and related products is planned for April 30, 2028. As of this date, no services of any kind will be available for this product. We advise against using RTI and related products in new projects. New Releases (Versions) of RTI and related products will be available for customers with a Software Maintenance Service Contract until April 30, 2027. Release 2026-B will be the last dSPACE Release that provides the Real-Time Interface products.
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Functionality Description
Partitioning the Simulink® model
  • Adding Simulink blocks for model partitioning via drag & drop
  • Generating highly optimized real-time simulation engine and communication code
  • Support of triggered subsystems distributed over multiple cores
  • Full support of interrupts on cores
Optimizing speed and accuracy
  • Integration algorithm and step size specific to each core
  • Single timer task/multiple timer task mode
  • Swinging buffer or shared memory communication mechanism for each individual connection
  • Communication between cores at different sampling rates
Implementing the model on multicore hardware
  • Automatic code generation
  • Download and start with a single click
  • Data acquisition with time stamps
  • Profile information for communication channels for optimizing the partitioning
Communication mechanisms
  • Asynchronous data transfer in shared memory mode
  • Synchronized and unsynchronized block data transfer in swinging buffer mode
  • Buffering and unbuffering of data via communication connection

Real-Time Interface (RTI) Implementation of MATLAB®/Simulink®/Stateflow® models on dSPACE hardware MicroLabBox I Compact prototyping unit for the laboratory
Contact Information

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