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User Documentation
RTI (Real-Time Interface)
FPGA Programming
RTI FPGA Programming Blockset Handcode Interface Guide
Introduction
FPGA Basics
Basics on the System Architecture
Components of the RTI FPGA Programming Blockset
Basics on Exchanging Data Between Processor and FPGA
Exchanging Data With the Processor Model
Software Tools for Working With the Handcode Interface of the RTI FPGA Programming Blockset
Supported Hardware
Typical Workflow
Modeling Aspects
Typical Workflow
Describes the typical workflow to integrate a custom FPGA application in a dSPACE hardware and software environment.
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Revision: May 2022
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