DS5101 Digital Waveform Output Board1)

Generating pulse patterns

The DS5101 Digital Waveform Output Board can generate a multitude of signals at various frequencies, including incremental encoder signals and pulse-width modulation waveforms. Its main area of deployment is hardware-in-the-loop simulation in automotive applications, for example, it is used for simulating sensors or controlling actuators.

The end of life for this product has been set. Please see the footnote for more detailed information.

  • Generates digital pulse patterns autonomously
  • 25 ns resolution on 16 channels
  • Standard pulse patterns such as PWM included

Application Areas 

Digital pulse patterns are required in almost any control application. The demands placed on PWM resolution and flexibility are very high, especially in drives control. This quickly pushes ordinary timing I/O to its limits. Digital signals in automotive applications usually require a lower resolution, but the demands on flexibility can still be high, for example, for the simulation of crankshaft signals.

Key Benefits

The DS5101 autonomously generates any TTL pulse patterns on up to 16 channels with high accuracy. With a time resolution of 25 ns, the DS5101 meets even the toughest requirements. The ability to change pulse widths in real time combined with various trigger and interrupt mechanisms give the DS5101 board unbeatable flexibility and programmability. 

Pulse Pattern Library

A library with standard pulse patterns is supplied. However, you can also program your own pulse patterns in an intuitive high-level language.

  • 1-phase PWM
  • 3-phase PWM
  • 3-phase/6-channel PWM (includes converted signals)
  • Incremental sensor simulation
  • Monoflop signal generation 

Parameter Specification
General
  • 16 timing I/O channels External reset input Interrupt controller
Memory Dual-port memory (DPMEM)
  • DPMEM for program (states) and data (delays) Stores 512 delay parameters (30 bits) and 128 program states (90 bits) for each channel
Interrupt controller
  • All timing I/O channels share a single physical interrupt to the processor board. Any channel can generate an interrupt. Interrupt arbitration is performed by software.
  • Interrupt on external reset
Timing I/O channels Time base
  • 25 ns time resolution
  • 40 MHz internal or 20 ... 40 MHz external common time base
  • 2 MHz maximum output frequency
  • 250 ns ... 26 s pulse widths
Triggering
  • Mutual triggering of all channels
  • Output channels configurable as input channels for trigger signals
Voltage range
  • TTL input/output level
Output current
  • Max. -15 mA/+64 mA
External reset input
  • TTL input level
Physical connections
  • 37-pin female Sub-D output connector
Host interface
  • One 8- or 16-bit ISA slot (power supply only)
Physical characteristics Physical size
  • 340 x 125 x 20 mm (13.4 x 4.9 x 0.8 in)
Ambient temperature
  • 0 ... 70 °C (32 ... 158 °F)
Power supply
  • +5 V ±5%, 0,5 A

1)The end of life of the dSPACE PHS (peripheral high-speed) hardware for modular systems is planned for December 31, 2024. You can still buy the related products up to and including December 31, 2021. New Releases of dSPACE software will still support the dSPACE PHS hardware for modular systems until at least the end of 2023. After the end of life, no services of any kind will be available for these products. We advise against using the PHS hardware products in new projects. For new projects we recommend that you use SCALEXIO, the latest dSPACE technology for modular real-time systems.

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