dSPACE V-ECU Task Force

VEOS processes data from a variety of sources.

Early virtual validation of ECU software with PC-based simulation platforms makes it possible to design particularly efficient development processes. By supporting and integrating different modeling approaches and standards, realistic simulation environments can be implemented easily and quickly. As a PC simulation platform for virtual ECUs, dSPACE VEOS offers added value, for example, when frontloading tests. Our software supports a variety of simulation formats, such as Simulink implementation containers (SIC), Functional Mock-up Units (FMU), restbus simulation (BSC), and virtual ECUs (V-ECU).

Various interfaces, such as XCP and XIL API, allow for convenient instrumentation of the simulation. Our many years of experience in the field of virtual validation have shown us that the challenges do not lie in the simulation itself and the test integration but in the virtualization of the artifacts required for the simulation. There is a number of processes and workflows, especially for generating the virtual ECUs, due to their varying complexity. While creating a V-ECU with only the application software (level 1) is still relatively simple, the application and basic software of a V-ECU at MCAL level (level 3) might have considerable dependencies on the underlying hardware. In addition to the technical challenges that have to be overcome when creating V-ECUs, the different software managers of an ECU bring about additional political and process-related dependencies during virtualization. If, for example, the OEM is typically responsible only for a part of the application software, large parts of the application software, and often also the majority of the parts of the basic software, might be provided by different suppliers.

A clear separation between the hardware and software layers as called for by standards such as AUTOSAR is usually not feasible. 

While the system under test (SUT) in the hardware-in-the-loop (HIL) test is the real ECU, the SUT in the software-in-the-loop (SIL) test consists of a variety of artifacts that represent only a part of the real ECU and that have to be transferred to a V-ECU. Testers face great challenges especially when tests are frontloaded from HIL to SIL, because the parties involved in the V-ECU are different from those involved in the typical HIL test. To support our customers in tackling these challenges successfully, dSPACE has set up the V-ECU Task Force. We want to help our customers to a successful start with our SIL tool chain and especially support them during V-ECU generation. For this purpose, we have brought together a team of technical experts from product development and Engineering Services departments that can quickly and flexibly come to the customers’ help.

 

In SIL validation, different parties interact with each other than in HIL validation. This also creates new challenges.

The team offers a wealth of experience with the V-ECU workflow and also aids customers in process-related challenges that involve different parties. The V-ECU Task Force supports not only the generation of V-ECUs, but also the integration of a V-ECU or SIL tool chain into the test process. You can immediately contact the V-ECU Task Force via your sales contact or directly at V-ECU_TaskForce@dspace.de

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