Interface to SCRAMNet+ networks
- Connects dSPACE Simulator and prototyping systems to SCRAMNet+ networks
- Provides standard SCRAMNet+ fiber-optic connections
- Supports standard features of SCRAMNet+
- RTI SCRAMNet+ Blockset for MATLAB®/Simulink®
This interface allows dSPACE Simulators to be integrated in existing simulator environments where SCRAMNet+ (Shared RAM Network) is the chosen node-to-node communication standard. It enables dSPACE prototyping systems to be the platform for distributed control systems and helps you satisfy high-speed requirements when developing real-time applications. SCRAMNet+ is ideally suited to applications including simulation, telemetry, robotics, data acquisition, instrumentation, industrial process control, digital video, and virtual reality.
With a SCRAMNet+ Interface, dSPACE Simulators and RCP solutions can take advantage of the very high speed and deterministic performance of shared memory in a SCRAMNet+ network. SCRAMNet+ interfaces are available for various bus architectures such as VME, PCI, PMC, and CompactPCI, so dSPACE systems can integrate with non-dSPACE systems at high speed and in real time. Since this interface can share data and interrupts, accurate real-time synchronization can be achieved between dSPACE and non-dSPACE systems. Data and interrupts are communicated at memory speeds, a huge improvement over typical message-passing networks. The result is interprocessor communication that is 100% deterministic and very low-latency.
The SCRAMNet+ network is an ultra-fast data communication system designed for use in real-time computer systems. SCRAMNet+ is optimized for the high-speed transfer of small packets of data between computers when low-latency data transmission and precise timing are critical.
A special SCRAMNet+ Blockset for MATLAB/-Simulink is available for the SCRAMNet+ Interface board. The blockset serves as a graphical interface that allows you to configure the SCRAMNet+ node, read from and write to the SCRAMNet+ shared memory, and handle interrupts, both memory- and error-based. This blockset gives you the ability to read and write to SCRAMNet+ memory in two ways: by specifying a starting address and the number of consecutive values to read or write, or by entering one or more addresses as an array that does not have to be sequential.