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DS3001/DS3002 Incremental Encoder Interface Boards

Precise position control

The DS3001/DS3002 Incremental Encoder Interface Boards are designed for precise position control. Typical application areas are robotics and drive control.

Key Benefits for DS3001

The DS3001 is designed for position control applications with sensors providing digital phase information. The board comprises five parallel input channels, each providing everything needed to connect an incremental encoder and process its output signals: a regulated encoder power supply with sense lines, differential or single-ended inputs for the encoder’s two phase lines, and an index input.

 

Key Benefits for DS3002

If digital encoder information cannot provide the desired position accuracy, or if you want to employ encoders with fewer lines, sinusoidal position sensor signals can significantly increase accuracy and resolution. The DS3002‘s six channels capture sinusoidal encoder signals and subdivide them up to 4096 times. Each channel has its own 32-bit position counter that can also be used for digital signals.  

Main Differences Between DS3001 and DS3002

  DS3001 DS3002
Number of channels 5 6
Position counter 24 bit 32 bit
Max. input frequency 1.25 MHz 750 kHz
Incremental encoder signal types Digital (differential RS422, single-ended TTL) Digital (differential RS422, single-ended TTL) and sinusoidal (11 μApp or 1 Vpp)
Resolution 4-fold subdivision 4-fold subdivision (digital) or 4096-fold subdivision (analog) between encoder lines

 

 

 

Parameter Specification
General
  • 5 independent incremental encoder interface channels
  • Differential inputs for encoder phase lines and an index line on each channel
  • Encoder power supply lines
  • Interrupt on index n Four-stage digital filter
Interrupt controller
  • 5 index interrupts (one for each channel)
Encoder signal types
  • Digital signals: single-ended (TTL) or differential (RS422)
  • Selectable individually for each channel
  • Minimum index pulse width 200 ns
Position counters
  • 24-bit counters
  • Max. 1.25 MHz input frequency, i.e., fourfold pulse count up to 5 MHz
  • Counter reset via hardware or software (asynchronous via PHS bus, synchronous via index-pulse once or always)
Encoder power supply lines
  • 5 V, 200 mA max. per channel n Voltage regulation with sense lines
Index detection
  • Separate index signal for each channel, via interrupt (edge-triggered) or flag (polling mode, level-triggered)
  • Index signal can be used for counter reset
Encoder interface
  • 150 Ω in series with 4.7 nF input impedance (RS422)
  • 200 mV min. differential input voltage (differential mode only)
  • 5 V max. common mode input voltage (differential mode only)
  • 200 ns minimum encoder state width (programmable)
  • 9.6 ms max. noise pulse width (programmable)
  • 200 ns minimum index pulse width
Physical connections
  • 50-pin female Sub-D input connector
Host interface
  • One 8- or 16-bit ISA slot (power supply only)
Physical characteristics Physical size
  • 340 x 125 x 15 mm (13.4 x 4.9 x 0.6 in)
Ambient temperature
  • 0 … 70 ºC (32 … 158 ºF)
Power supply
  • +5 V ±5%, 2.5 A
  • +12 V ±5%, 1.2 A
  • -12 V ±5%, 150 mA

 

 

 

Parameter Specification
General
  • 6 independent incremental encoder interface channels
  • Differential inputs for encoder phase lines and an index line on each channel
  • Synchronized sampling of multiple channels
  • Encoder power supply line per channel
  • On-board line termination
  • Connector for measuring pulse widths and frequency of count/index pulses with other I/O boards, e.g., DS5001
Encoder signal types
  • Sinusoidal signals: 11 µApp differential or 1 Vpp differential
  • Digital signals: single-ended (TTL) or differential (RS422)
  • Selectable individually for each channel
  • Minimum index pulse width 250 ns
Position counters
  • 32-bit counters
  • Max. 750 kHz input frequency, i.e., fourfold pulse count up to 3 MHz
  • Counter reset or preload via software or automatically on index pulse
Encoder power supply lines
  • 5 V, 200 mA max. per channel
  • Voltage regulation with sense lines
Input performance ADC
  • 12-bit resolution
  • 800 ns data conversion time, 10 MSPS (pipelined)
Offset error (PHI0, PHI90)
  • ±4 mV for 1 Vpp (±0.08 % position error)
  • ±75 nA for 11 µApp (±0.14 % position error)
ADC nonlinearity
  • ±0.06 % resulting position error n
Gain match (PHI0, PHI90)
  • ±0.25 % (±0.025 % position error) of 1 Vpp n ±0.6 % (±0.06 % position error) of 11 µApp
Common mode rejection ratio
(PHI0, PHI90 in 1 Vpp mode only)
  • ±2.5 mV/V (±0.05 %/V position error) each channel
Sinusoidal signal capture
  • Up to 4096 subdivisions between two encoder lines
  • Position calculation on processor board (look-up tables and interpolation)
Physical connections
  • 62-pin female Sub-D input connector
Host interface
  • One 8- or 16-bit ISA slot (power supply only)
Physical characteristics Physical size
  • 340 x 125 x 15 mm (13.4 x 4.9 x 0.6 in)
Ambient temperature
  • 0 … 70 ºC (32 … 158 ºF)
Power supply
  • +5 V ±5%, 2.0 A
  • +12 V ±5%, 200 mA plus 200 mA for each channel in use

Basic Information