For a better experience on dSPACE.com, enable JavaScript in your browser. Thank you!

dSPACE – DS5202 FPGA Base Board

For high-resolution signal preprocessing

The FPGA Base Board is the basis for very fast, high-resolution signal preprocessing solutions, such as advanced PWM measurement for electrical machines, resolver interfaces, and proprietary buses.

Overview

The DS5202 FPGA Base Board is designed for applications that require very fast, high-resolution signal preprocessing, for example:

  • High-precision digital capturing of three-phase PWM signals
  • Simulation of engine speed/position sensors for electric motors
  • Fast current/voltage measurements, connection of diverse position encoders and control of AC motors
  • Electric motor simulation
  • Connection of dSPACE real-time systems to EtherCAT networks as slaves

Key Benefits

The FPGA (field-programmable gate array) code and the piggyback module for the DS5202 FPGA Base Board are always tailored to specific applications, according to customer specifications, and can be adapted to other projects. Algorithms for real-time applications with high sampling rates can be shifted to the FPGA. The time resolution of the signals depends on how the FPGA is programmed. The reference frequency for the control loop is set in the digital frequency synthesizer (DFS). Even with complex FPGA algorithms, the typical working range is 40 ... 80 MHz. The piggyback module allows flexible integration of I/O drivers and special combinations of analog/digital inputs/outputs and bus drivers.

Parameter Specification
General
  • Customization module site for a piggyback module providing customer-specific I/O adaptations
  • 180 I/O lines from piggyback module to FPGA
  • 18 I/O channels from piggyback module to a Sub-D connector on the board‘s rear bracket
  • Additional I/O channels available via an additional bracket to a Sub-D connector
FPGA
  • Xilinx® Spartan®-3 XC3S4000
  • System gates: 4 million n Equivalent logic cells: 62,208
  • CLBs: 6912
  • Distributed RAM: 432 kbit
  • Block RAM: 1728 kbit n 96 dedicated multipliers n 4 digital clock manager (DCMs)
Host interface
  • One 16-bit ISA slot (power supply only)
Physical characteristics Physical size
  • 340 x 125 x approx. 20 mm (13.4 x 4.9 x approx. 0.8 in). The actual height depends on the specific piggyback module.
Piggyback module size
  • 123.5 x 114.3 mm (4.86 x 4.5 in)
Ambient temperature
  • 0 ... 70 ºC (32 ... 158 ºF)
Power supply
  • +5 V ±5%, 500 mA (without piggyback module)
  • Power supply lines to piggyback module: ±12 V, +5 V, and +3.3 V. Power consumption of the piggyback module depends on the implemented application.

 

 

Basic Information