Running Back-to-Back Tests with TargetLink®
- Model-in-the-loop simulation
- Software-in-the-loop simulation
- Processor-in-the-loop simulation
Verification by Simulation
One of the advantages of model-based development is that you can use simulation for early verification. TargetLink not only generates code for production ECUs, it also greatly simplifies the testing process. Tests are performed in the same simulation environment that was used to specify the underlying simulation model. TargetLink supports three simulation modes for testing the code that it generates: model-in-the-loop (MIL), software-in-the-loop (SIL), and processor-in-the-loop (PIL).
The first step is to record data for reference plots from the simulation model. The model-in-the-loop simulation captures the specified behavior of the model that is to be implemented in C code later on. These act as the reference for the next verification steps.
SIL means the code is generated and it replaces the controller blocks in the same simulation model (e.g. same plant and stimulus signals). The simulation plots should be widely identical when compared to the results of model-in-the-loop simulation. If they are not, the plots can be analysed to get a better understanding about the cause of the deviation.
Finally, the generated code runs on an embedded processor. An off-the-shelf evaluation board is connected to the host PC, and the generated code is compiled and downloaded to the evaluation board. If plots from Processor-in-the-Loop simulation deviate from Software-in-the-Loop simulation, the most likely cause is a bug in the target compiler or a problem with the processor.