FPGA Electric Drives

(based on Xilinx® Vitis Model Composer HDL Library, the former Xilinx® System Generator (XSG) Blockset)

dSPACE provides various real-time components with FPGAs that can be freely programmed by using either hand code (HDL) or a block-oriented environment. This training course focuses on the block-oriented approach. based on Xilinx<sup>®</sup> Vitis<sup>™</sup> Model Composer HDL Library, the former Xilinx<sup>®</sup> System Generator (XSG) Blockset, is integrated directly in MATLAB®/Simulink® so that the procedure for modeling FPGA implementations for electric drives is similar to the process for modeling commonly used microprocessors.

The training course will equip you with the skills required for working with the dSPACE XSG Electric Components Library to embed electric drive applications on FPGA-based real-time hardware:

  • Integrate inverter, motor, sensor, and mechanical models directly on the FPGA
  • Run these models in open or closed loop control
  • Modify the components’ parameterization during run time

Because the training exercises contain elements from the dSPACE XSG Utils Library, you must already be familiar with this library (requirement: FPGA Basic Training).

  • Engineers involved in HIL testing ECUs for electric drive applications
  • Required: Previous experience with MATLAB®/Simulink®, XSG Utils Library, ControlDesk, and ConfigurationDesk

  • Interfacing and configuring FPGA applications
  • Accessing the onboard I/O
  • Using the XSG Electric Components library to embed e-motor simulation on the FPGA

  • XSG Electric Components models
  • MATLAB®/Simulink®
  • Xilinx® Vitis<™ Model Composer HDL Library, the former Xilinx® System Generator (XSG)
  • SCALEXIO real-time system

  • Overview of the XSG Electric Components Library
  • Parameterization of FPGA components during runtime

DatesLocation and time Fee per person
June 20, 2024 Paderborn (Deutschland), 9:00 bis 17:15 Uhr € 850 (plus tax)

20% discount for universities

When booked in combination with 'FPGA Basic', the overall fee per person is € 1950 (plus tax)
When booked in combination with 'FPGABasic', the overall fee per person is € 1950 (plus tax)
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